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21-24 September 2025 - Taormina, Italy

20th International Conference on PhD Research in Microelectronics and Electronics

PRIME 2025 will be held at Caparena Hotel in Taormina, Italy. PRIME has been established over the recent years as an important conference where PhD students and post-docs with less than one year post-PhD experience can present their research results and network with experts from industry, academia and research.

The main goals of the conference are:
to encourage favourable exposure to PhD students in the early stages of their careers
to benchmark PhD research in a friendly and cooperative environment
to enable sharing of student and supervisor experiences of scientific and engineering research
to connect PhD students and their supervisors with companies and research centres

PRIME 2025 will feature a conference program reflecting the wide spectrum of research topics in Microelectronics and Electronics, building bridges between various research fields. In addition to the technical sessions, opportunities for the conference attendees will be the keynote talks, exhibits and social events. The conference is technically co-sponsored by IEEE and IEEE CAS and accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore's scope and quality requirements.


Areas of Interest

Micro/Nanoelectronics
Semiconductors
Analog/Digital Signal Processing
Computer Aided Design
Analog/Digital/Mixed/RF IC Design
Power Management/Energy Harvesting ICs
Sensors and MEMS
Semiconductor Memories
RF, Microwave and mm-wave Circuits
VLSI and SoC Applications
Biomedical/Flexible Electronics
Automotive
Semiconductor Testing
Technical Trends & Challenges


Other topics within the electronics field will also be considered.

Important Dates

Paper submission deadline: April 14th, 2025April 24th, 2025
Author notification : May 14th, 2025
Final paper submission deadline: July 7th, 2025


Organizing Committee

Salvatore Pennisi
Salvatore Pennisi General Co-Chair
University of Catania
Alfio Dario Grasso
Alfio Dario Grasso General Co-Chair
University of Catania
Gianluca Giustolisi
Gianluca Giustolisi Technical Program Committee Co-Chair
University of Catania
Marcel Runge
Marcel Runge Technical Program Committee Co-Chair
Technische Universität Berlin
Elisabetta Moisello
Elisabetta Moisello Technical Program Committee Co-Chair
University of Pavia
Antonio Jesus Torralba Silgado
Antonio Jesus Torralba Silgado Finance Chair
University of Sevilla
Antonio Aprile
Antonio Aprile Publication Chair & Publicity Co-Chair
University of Pavia
Andrea Ballo
Andrea Ballo Publicity Co-Chair
University of Catania
Edoardo Bonizzoni
Edoardo Bonizzoni Industrial Liaison Chair
University of Pavia
Giulia Di Capua
Giulia Di Capua WiCAS & YPCAS & DEICAS Chair
University of Cassino and Southern Lazio
Marco Privitera
Marco Privitera Local Arrangement Chair
University of Catania
Friedel Gerfers
Friedel Gerfers International Liaison Co-Chair
Technische Universität Berlin
Paul Sotiriadis
Paul Sotiriadis International Liaison Co-Chair
National Technical University of Athens

Steering Committee

Franco Maloberti
Franco Maloberti University of Pavia
Catherine Dehollain
Catherine Dehollain EPFL
Alberto Gola
Alberto Gola Power Integrations
Bernd Deutschmann
Bernd Deutschmann TU Graz
Elena Blokhina
Elena Blokhina University College Dublin
Gunhan Dundar
Günhan Dündar Bagazici University
Ravinder Dahiya
Ravinder Dahiya University of Glasgow
Nuno Horta
Nuno Horta University of Lisbon
Salvatore Pennisi
Salvatore Pennisi University of Catania
Edoardo Bonizzoni
Edoardo Bonizzoni University of Pavia
Sandro Carrara
Sandro Carrara EPFL
Julius Georgiou
Julius Georgiou University of Cyprus
Matteo Pisati
Matteo Pisati Synopsys

Plenary Speakers

Massimo Alioto

Green Intelligent & Connected Systems at the Trillion Scale, Sustainably

Massimo Alioto

National University of Singapore

Recent semiconductor scaling trends continue to support the evolution of silicon systems beyond the inevitable end of technology scaling, growing the deployment of intelligent and connected chips towards the trillion range by the end of the decade. Such evolution vastly outranges any application ever deployed by human beings, and its sustained growth is now fundamentally impeded by batteries as conventional source of energy. From a silicon chip viewpoint, batteries at the trillion scale severely limit advances in cost, form factor, system lifespan and chip availability over time. From a societal perspective, batteries in the trillions threaten economic and environmental sustainability of the underlying scaling trend, and hence its feasibility.
This talk introduces the key ideas and their silicon demonstrations to enable a new breed of always-on silicon systems from sensing, to computing and wireless communications with no battery inside (or any other energy storage). Highly power-scalable systems with adaptation to the highly-fluctuating power profile of energy harvesters is shown to enable next-generation pervasive integrated systems with cost well below 1$, size of few millimeters, long lifetime well beyond the traditional shelf life of batteries, yet at near-100% up-time.
Sensor interfaces, processors and wireless transceivers fitting existing infrastructure (e.g., WiFi, Bluetooth) with power reductions by orders of magnitude are discussed and exemplified by numerous silicon demonstrations from our research group, and their system integration. Ultimately, the technological pathway discussed in this talk supports sustainable growth of applications leveraging large-scale deployments of silicon systems, making our planet smarter. And greener too.

Massimo Alioto

Optimizing the Design of Analog Circuits with Natural and Artificial Intelligence

José M. de la Rosa

Institute of Microelectronics of Seville IMSE-CNM (CSIC University of Seville)

The design of analog circuits typically follows the well-established top-down/bottom-up methodology, involving synthesis tasks at various abstraction levels: from specifications/systemlevel to electrical/circuit-level and finally physical/layout implementation. While significant progress has been made in optimizing the analog synthesis and verification processes, current EDA tools and design methods still fall short of offering a fully automated design flow, unlike the more advanced automation available for digital circuit design.
This talk provides an historical perspective and overview of the automated design and optimization of analog and mixed-signal circuits and systems, and how the different optimization techniques, heuristic methods and expert human know-how are combined with emerging Machine Learning (ML) based approaches. Sigma-Delta (ΣΔ) Modulators will be taken as examples and case studies to illustrate the evolution with natural and artificial intelligence in design automation of analog circuits and systems.

Massimo Alioto

Tales of a Spur Hunter: The Wandering Spur

Michael Peter Kennedy

University College Dublin

During the early 2000s, users of fractional-N frequency synthesizers noticed intermittent pulsing of the noise floor and unexplained spurious frequency components moving about the spectrum for some settings of the fraction. These became known by a number of names including moving spurs, walking spurs, marching spurs, and wandering spurs. The Nonlinear Circuits Group spent ten years finding the root cause of these strange spurs, developing solutions to mitigate them, and transferring the technology into commercial products.
This is the story of that journey from a diversity of experimental manifestations to reproduction in simulation, a theoretical explanation, a first solution that failed in implementation, diagnosing the cause of the first failure, a second solution that worked better, and incorporation of that solution into a commercial product. It illustrates a research journey from need-driven basic research to commercial exploitation.

Conference Venue

Hotel Caparena

The conference venue is Hotel Caparena, a magnificent location in Taormina, "Home" for people who love the sea and nature. It is the ideal setting for lovers of unforgettable sunsets and sun-drenched shores and is the place for gazing at the sea while surrounded by a blaze of purple, orange and red bougainville petals all year round. The warm and inviting ambience of Hotel Caparena, with its terracotta floors, the elegant fabrics, its pool and terraces, provides complete sensory experiences to be discovered and absorbed. Discover more about the conference venue and its services here.

Partner Hotels - Book Your Stay

To ensure a comfortable stay, we have partnered with selected hotels that offer special rates for PRIME 2025 participants. A variety of hotels are available in Taormina and Letojanni, some of which provide shuttle services to the conference venue. Special rates have been negotiated for attendees.
Booking procedures, rates, and availability details can be found here.
For those interested in staying at UNA Hotel Naxos Beach, one of our partner hotels, you can reserve your room by filling out the official reservation form here. A free shuttle service will be available from the hotel to the conference venue.

We recommend booking early to secure your preferred accommodation.

How to Arrive

Hotel Caparena can be reached using different transportation options:
The nearest airport is Catania Fontanarossa International Airport (CTA), about 64 km from the venue.
There are trains and direct bus connections to Taormina.
Taxis and private transfer services are available for a direct journey.
A dedicated shuttle service is provided from some partner hotels to the venue.
For a complete guide on how to reach Hotel Caparena, including transport options and booking links, click here.
If you need further assistance with your travel arrangements, feel free to contact us at info@prime-conference.org.

Information for Authors

The PRIME 2025 Call For Papers is available for download. The working language for the conference is English, which will be used for all presentations and printed material.
Any author can submit an unlimited number of papers, but the same speaker cannot present more than two papers.
The first author/presenter of each paper must be either a PhD student, a Master's student or a Bachelor's student; by PhD student we mean a student who is currently working toward his/her PhD thesis or who has discussed his/her PhD thesis whitin one year in advance of the paper submission deadline.

Paper Preparation and Submission

Paper Length: The maximum number of accepted pages is 4, including all figures, tables and references.
Paper Size: Only US Letter (8.5" x 11") or A4 (210mm x 297mm) formats are allowed.
Paper Format: Authors should prepare the manuscript according to the IEEE double column conference paper template style.
File Size: The size of the PDF files submitted should not exceed 2.0 MB.

Reviewing Process

Papers submitted for review must clearly state:
the purpose of the work
how and to what extent it advances the state-of-the-art
specific new results and their impact

The degree to which the paper deals with these issues will affect whether the paper is selected. The most frequent cause of rejection of submitted papers is lack of new results. Only work that has not been previously published at the time of the conference will be considered.
Submission of a paper for review and subsequent acceptance is considered by the Committee as an agreement that the work will not be placed in the public domain prior to the conference. The quality of the conference will be guaranteed by a thoroughly selected Technical Program Committee, which will provide feedback to the authors.

Awards

Based on the reviewers' and the awards-committee's evaluation top 30% papers will be awarded as follows:
GOLD LEAF Certificate for the top 10% papers
SILVER LEAF Certificate for papers between top 10% and top 20%
BRONZE LEAF Certificate for papers between top 20% and top 30%

Plagiarism and excessive re-use of earlier material

Papers submitted for PRIME 2025 will be checked for plagiarism and improper re-use of authors’ earlier material using IEEE CrossCheck.

Ethical policy

PRIME 2025 follows IEEE ethical guidelines and policies in terms of non-discrimination and privacy.

Company Fair

As in previous editions, a company fair will be held at the PRIME 2025 conference venue to promote networking and allow participants to establish cooperations with industries.

Several exhibition and sponsorship opportunities are available and will be allocated on a first come first serve basis:
PLATINUM SPONSOR (limited availability)
GOLD SPONSOR
SILVER SPONSOR
WELCOME RECEPTION (one available)
COFFEE BREAK (three available)

A detailed prospectus can be downloaded here.